Nowadays, a system is used which executes information processing and communication with a combination of a central processing unit (CPU), a memory, and a hardware circuit such as a field-programmable gate array (FPGA). In such a system, the CPU, the memory, and the circuit such as the FPGA are connected by a transmission line exemplified by a system bus, an interconnect, or a crossbar. Further, the CPU and the FPGA are respectively provided with cache memories, and cache controllers controlling the cache memories maintain the consistency (also referred to as coherency) between the cache memories and the memory and the consistency between the cache memories.
Further, the CPU and the FPGA exchange data with the memory via the cache memories and the transmission line. Further, a graphics processing unit (GPU) may be used as well as or in place of the CPU. The CPU or the GPU will hereinafter be referred to as the arithmetic device. Further, the hardware circuit including, but not limited to, the FPGA and cooperating with the arithmetic device via the transmission line such as the system bus will be referred to as the arithmetic circuit. The arithmetic device and the arithmetic circuit, however, may be collectively referred to as the arithmetic circuits without distinction therebetween. Related art includes International Publication Pamphlet No. WO 2017/010004.
In the above-described system, a plurality of arithmetic circuits therein traditionally exchange information via the memory. When the plurality of arithmetic circuits connected to the transmission line such as the system bus exchange information via the memory, however, a memory band for another component of the system, such as the arithmetic device, for example, to access the memory is consumed, which may degrade the performance of the system.
An object of the embodiments discussed herein is therefore to enable a system including a memory and a plurality of arithmetic circuits to exchange information between the arithmetic circuits while suppressing the deterioration in the performance of the system including the performance of the memory.